Chapter 1: Introduction
R
The ML555 board is supported by Xilinx LogiCORE IP versions 4 and 6, respectively. Each
core has a primary version number, shown in Table 1-1 , followed by a revision or build
number. More information about the current versions of these cores is available in the
LogiCORE data sheets for the PCI and PCI-X section of the PCI/PCI-X product lounge
(refer to h ttp://www.xilinx.com/products/logicore/lounge/lounge.htm ). Table 1-1 lists
the Xilinx cores for PCI and PCI-X operation.
Table 1-1:
Xilinx Cores Supporting PCI and PCI-X Operation
Version
v4
v4
v4
v6
v6
v6
v6
Bus
Mode
PCI
PCI
PCI
PCI-X
PCI-X
PCI-X
PCI
Bus Width
32 bits
32 bits
64 bits
64 bits
64 bits
64 bits
64 bits
Clock
Frequency
33 MHz
66 MHz
33 MHz
133 MHz
100 MHz
66 MHz
33 MHz
Clock Type
(FPGA Pin #)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
These Xilinx interface cores are pre-implemented and fully tested modules for Xilinx
FPGAs.
The v4 64-bit interface is compliant with the PCI Local Bus Specification, revision 3.0. The
v6 64-bit interface is compliant with the PCI Local Bus Specification, revision 3.0, and the
PCI-X Addendum, revision 2.0.
The pinout for each Virtex-5 device and the relative placement of the internal logic are
predefined. Critical paths are controlled by constraints to ensure predictable timing,
significantly reducing the engineering time required to implement the bus interface
portion of a user design. When targeting an XC5VLX50T-FFG1136 FPGA, the Xilinx CORE
Generator? tool provides an example design and a constraints file utilizing the ML555
board pinout for PCI and PCI-X designs.
Resources can instead be focused on unique user application logic in the FPGA and on the
system-level design. As a result, the Xilinx interface products for PCI and PCI-X operation
minimize product development time.
The following links provide more information:
?
?
Xilinx LogiCORE products:
PCI and PCI-X specific applications:
Included with the purchase of the ML555 development kit is a 90-day access to full system
hardware evaluation versions of the Virtex-5 FPGA LogiCORE products for PCI and PCI-X
designs. The following link provides additional information specific to the ML555 board
and LogiCORE products:
14
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
相关PDF资料
HW-V5-ML561-UNI-G EVALUATION PLATFORM VIRTEX-5
I-JET JTAG ARM DEBUGGING PROBE
IAC24A INPUT MODULE AC 5MA 24VDC
IAC5EQ INPUT MODULE AC 10MA 5VDC
IB8RM SURGE SUPP 8OUT 12'CORD W/REMOTE
IBAR12-20T SURGE SUPPRSSR 20A 12OUT RACKMNT
IBAR12/20ULTRA SURGE SUPPRSSR 20A 12OUT RACKMNT
IBAR12ULTRA SURGE SUPPRSSR 15A 12OUT RACKMNT
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